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BEIJING, Jan. 15, 2025 /PRNewswire/ -- WiMi Hologram Cloud Inc. (NASDAQ: WiMi) ("WiMi" or the "Company"), a leading global Hologram Augmented Reality ("AR") Technology provider, today announced the development of a hybrid CPU-FPGA quantum AI simulator. The development of the quantum AI simulator aims to simulate the behavior of quantum computers, enabling testing and optimization of quantum algorithms on existing classical computers. Traditional simulators are often limited by the computational power of the CPU, making it difficult to handle large-scale quantum systems. To overcome this limitation, WiMi has adopted a hybrid CPU-FPGA approach, combining the versatility of the central processing unit (CPU) with the parallel processing capabilities of the field-programmable gate array (FPGA). The core technical framework of WiMi's CPU-FPGA architecture simulator consists of two main components: CPU part: Responsible for handling the high-level logic and complex algorithmic tasks of the simulator. The powerful computational capabilities of the CPU enable the simulator to execute complex quantum algorithms and machine learning models. FPGA part: Specifically designed for executing parallel computing tasks such as simulating quantum states and performing quantum gate operations. The parallel processing capabilities of the FPGA significantly enhance the computational speed of the simulator while reducing power consumption. The WiMi CPU-FPGA hybrid quantum AI simulator utilizes the parallel processing capabilities and programmability of FPGA to execute specific quantum computing tasks. FPGA (Field-Programmable Gate Array) is a hardware device that can be programmed to perform specific tasks, enabling custom parallel computing operations, which is particularly important in handling quantum algorithms. By integrating FPGA into the simulator, the simulation speed of quantum algorithms can be significantly enhanced, while reducing power consumption. Another key aspect of the WiMi hybrid CPU-FPGA approach is the implementation of software-hardware co-design optimization. At the software level, a dedicated simulator framework has been developed, which efficiently manages quantum states and performs quantum gate operations. This framework is tightly integrated with the hardware layer, ensuring efficient execution of algorithms. At the hardware level, the CPU and FPGA are closely interconnected through high-speed interfaces, enabling seamless collaboration between the two to accomplish complex computational tasks. Furthermore, this technical approach also involves a deep understanding of existing quantum computing and AI technologies. The quantum AI simulator is not just a simple simulation tool; it must be able to adapt to evolving quantum algorithms and AI models. Therefore, the design of the simulator needs to have sufficient flexibility and scalability to support future technology upgrades and the development of new algorithms. WiMi hybrid CPU-FPGA quantum AI simulator technology framework: Hardware layer: The simulator employs high-performance CPUs and customized FPGA chips, which are tightly interconnected through high-speed interfaces. Software layer: A dedicated software framework has been developed to support the simulation of quantum algorithms and the training of AI models. The software framework includes quantum state management, quantum gate operations, and machine learning algorithm libraries. Interface layer: Compatibility with existing quantum computing software and AI platforms is provided, ensuring that the simulator can seamlessly integrate into existing research and development workflows. The technical logic of WiMi's hybrid CPU-FPGA quantum AI simulator is a complex process that involves multiple dimensions and levels. It encompasses aspects such as hardware architecture selection, software-hardware co-optimization, technical compatibility, and meeting practical application requirements. The implementation of this technical logic not only drives technological advancements in the fields of quantum computing and artificial intelligence but also provides new possibilities for future computing technology development. WiMi has developed a powerful tool in the form of a hybrid CPU-FPGA quantum AI simulator, which is available to businesses and research institutions for exploring the potential of quantum algorithms and developing new AI applications. With the continuous advancement of quantum computing technology, this type of simulator is expected to play a crucial role in future quantum computing and AI research. Through the hybrid CPU-FPGA approach, WiMi is driving the development of quantum AI simulation technology and opening up new avenues for the integration of quantum computing and artificial intelligence. The application of this innovative technology will accelerate the research on quantum algorithms and facilitate the fusion and progress of quantum computing and AI technologies. About WiMi Hologram CloudWiMi Hologram Cloud, Inc. (NASDAQ:WiMi) is a holographic cloud comprehensive technical solution provider that focuses on professional areas including holographic AR automotive HUD software, 3D holographic pulse LiDAR, head-mounted light field holographic equipment, holographic semiconductor, holographic cloud software, holographic car navigation and others. Its services and holographic AR technologies include holographic AR automotive application, 3D holographic pulse LiDAR technology, holographic vision semiconductor technology, holographic software development, holographic AR advertising technology, holographic AR entertainment technology, holographic ARSDK payment, interactive holographic communication and other holographic AR technologies. Safe Harbor Statements This press release contains "forward-looking statements" within the Private Securities Litigation Reform Act of 1995. These forward-looking statements can be identified by terminology such as "will," "expects," "anticipates," "future," "intends," "plans," "believes," "estimates," and similar statements. Statements that are not historical facts, including statements about the Company's beliefs and expectations, are forward-looking statements. Among other things, the business outlook and quotations from management in this press release and the Company's strategic and operational plans contain forward−looking statements. The Company may also make written or oral forward−looking statements in its periodic reports to the US Securities and Exchange Commission ("SEC") on Forms 20−F and 6−K, in its annual report to shareholders, in press releases, and other written materials, and in oral statements made by its officers, directors or employees to third parties. Forward-looking statements involve inherent risks and uncertainties. Several factors could cause actual results to differ materially from those contained in any forward−looking statement, including but not limited to the following: the Company's goals and strategies; the Company's future business development, financial condition, and results of operations; the expected growth of the AR holographic industry; and the Company's expectations regarding demand for and market acceptance of its products and services. Further information regarding these and other risks is included in the Company's annual report on Form 20-F and the current report on Form 6-K and other documents filed with the SEC. All information provided in this press release is as of the date of this press release. The Company does not undertake any obligation to update any forward-looking statement except as required under applicable laws.
HANGZHOU, China, Jan. 9, 2025 /PRNewswire/ -- Recently, SpacemiT, a RISC-V AI CPU company from China, announced breakthrough progress in the development of its server CPU chip SpacemiT Vital Stone® V100. It now provides a complete RISC-V CPU chip hardware and software platform that fully supports server specifications. Key IPs: RISC-V CPU core X100, AIA and APLIC supporting interrupt virtualization, IOMMU supporting memory virtualization, IOPMP supporting security functions, LPC and eSPI supporting communication with mainstream BMCs, etc. The 64-bit server-grade RISC-V CPU core X100 delivers a single-core performance of >9 points/GHz on SPECINT2006 at 2.5GHz@12nm. X100 supports the RVA23 Profile, full virtualization (Hypervisor 1.0, AIA 1.0, IOMMU), RAS features, Vector 1.0 extension, vector encryption and decryption, security, 64-core interconnect, and more. The IOMMU IP adheres to the RISC-V IOMMU architecture specification and the AXI4-Stream DTI interface, supporting configurable DID, PID, virtual address, physical address width, and various levels of translation cache sizes. It can be flexibly integrated into different locations within the SoC bus system to enable distributed peripheral virtualization and accelerator acceleration. X100 Multicore System Key Subsystems: Including CPU subsystem, bus subsystem, IOMMU subsystem, interrupt subsystem, debug & trace subsystem, clock & reset subsystem, RMU management and control subsystem, etc., thereby realizing the development of the server CPU chip platform. Software R&D Progress: Based on the self-developed server CPU chip platform, the development of server platform firmware that complies with the RISC-V BRS Spec specification has been completed. This includes openSBI/UEFI (BIOS)/Linux and other low-level software that meets the requirements of the Supervisor Binary Interface (SBI), UEFI (BIOS), SMBIOS, ACPI, and other specifications. The Linux operating system has been adapted and ported, and it supports the GlobalPlatform-standard OP-TEE secure operating system. The platform firmware and operating system can now be successfully run and demonstrated on an FPGA of the server CPU chip platform. Software About SpacemiT: SpacemiT is a computing ecosystem enterprise based on the new-generation RISC-V architecture, with a layout covering full-stack computing technologies such as high-performance RISC-V CPU cores, AI-CPU cores, AI CPU chips, and software systems. It provides end-to-end computing system solutions and is committed to building the best native computing platform for the new AI era of large models using RISC-V AI CPUs, thereby promoting the development of new applications such as AI computers and AI robots. Please visit https://www.spacemit.com/en/ for more information. Business Contactbusiness@spacemit.com Media Contactmedia@spacemit.com
SHANGHAI, Jan. 2, 2025 /PRNewswire/ -- The LattePanda Team is excited to announce the launch of the high-performance LattePanda Mu, featuring an Intel 8-core N305 processor and 16GB of RAM. This new compute module offers a significant upgrade in processing power and memory capacity over the existing Intel N100-based 4-core Mu, while maintaining complete size and interface compatibility. LattePanda Mu: the x86 Microcomputer Module with Intel 8-Core N305 CPU and 16GB RAM At the core of the LattePanda Mu is the Intel® Core™ i3-N305 processor, which operates at a maximum frequency of 3.8GHz. This 8-core processor delivers more than 3 times the multi-core processing power of a Raspberry Pi 5, making it ideal for demanding, multi-threaded tasks. Additionally, it comes with extensive I/O options, including 3 HDMI/DisplayPort, 8 USB 2.0 ports, up to 4 USB 3.2 ports, and up to 9 PCIe 3.0 lanes, ensuring seamless integration with various peripherals. Complementing its powerful CPU, the new 8-core LattePanda Mu features an impressive 16GB of RAM—double the capacity of the Intel N100-based 4-core model. This expanded memory enhances user experience when running large software applications and multitasking. "The launch of the enhanced LattePanda Mu reinforces our commitment to innovation and meeting the evolving needs of our community," said WangBo, the product manager of LattePanda Mu. "With substantial upgrades to CPU performance and increased memory capacity, the LattePanda Mu is designed to fulfill our customers' customization needs. Our customization services cater to various specialized requirements, enabling users to unleash the full potential of the LattePanda Mu and achieve exceptional results." The newly enhanced LattePanda Mu is now available for $259. For more details and to make a purchase, please visit our website.
SHENZHEN, China, Dec. 31, 2024 /PRNewswire/ -- MicroAlgo Inc. (the "Company" or "MicroAlgo") (NASDAQ: MLGO), today announced the successful development of a groundbreaking quantum algorithm technology, specifically a FULL adder operation based on CPU registers in quantum gate computers. This innovative technology brings new possibilities to the development of quantum computing. It not only significantly enhances the efficiency and accuracy of quantum computers when performing complex computational tasks but also opens new pathways for the design and implementation of quantum gate computers. In classical computing, computers represent data and perform computations using bits (0 or 1). At any given moment, each bit can only be in one of two states: "0" or "1." Quantum computers, on the other hand, are different. Their fundamental unit of computation—the quantum bit (qubit)—can exist in a superposition of both "0" and "1" states simultaneously. By leveraging this property, quantum computers can solve certain problems much faster than classical computers. A Quantum Gate Computer is a model of quantum computing that performs computational operations by applying quantum gates to qubits. Quantum gates are similar to classical logic gates, but their operations extend beyond binary bit manipulations to include more complex transformations of qubits. In quantum computers, managing and manipulating qubits has always been a key challenge and focus of technological development. Similar to classical computers, quantum computers also require registers to store and process data. In the latest technology developed by MicroAlgo, they have successfully implemented the FULL adder operation using CPU registers based on quantum gate computers. A FULL adder is a fundamental arithmetic unit in classical digital circuits, used to perform the addition of two or more binary numbers. In classical computers, the design and implementation of a FULL adder are relatively simple, as it only deals with fixed binary bits. However, in quantum computing, the situation is much more complex due to the properties of qubits, such as superposition and quantum entanglement. The quantum algorithm technology developed by MicroAlgo allows quantum computers to efficiently handle complex arithmetic tasks by implementing FULL adder operations in a quantum gate computer. The core of this innovative technology lies in how quantum gates and qubit properties are leveraged to simulate and perform FULL adder operations. With this technology, quantum computers can achieve faster computation speeds and higher computational accuracy when performing addition operations, taking advantage of quantum parallelism and quantum entanglement. This technology, developed by MicroAlgo, is based on the classical Bernstein-Vazirani algorithm. The Bernstein-Vazirani algorithm is an important algorithm in quantum computing, capable of determining a hidden bit string with a single quantum query—something that would require multiple queries in classical computing. In MicroAlgo's implementation, they use the Bernstein-Vazirani algorithm to demonstrate a simple memory example called a register. Registers in quantum computers function similarly to those in classical computers, used for temporary storage and processing of data. Unlike classical computers, however, quantum computer registers can store multiple states (superposition) simultaneously, which gives quantum computers higher parallelism and efficiency when performing certain specific tasks. Through the Bernstein-Vazirani algorithm, MicroAlgo has successfully designed a quantum register that is easy to physically access. This register not only efficiently stores and processes qubits, but it can also implement the functionality of a FULL adder through quantum gate operations. This innovative design lays a solid foundation for the practical application of quantum computers. The quantum algorithm technology developed by MicroAlgo, based on FULL adder operations in CPU registers of quantum gate computers, has broad application prospects. First, this technology can significantly improve the efficiency and accuracy of quantum computers when handling complex arithmetic tasks. In particular, in fields like large-scale data processing, encryption and decryption, and optimization problems, the performance advantages of quantum computers will be fully realized. Furthermore, this technology provides new insights for the design and implementation of quantum computers. By combining classical computing concepts such as registers and FULL adder operations with quantum computing elements like quantum gates and qubits, MicroAlgo has successfully developed a quantum algorithm technology with practical application value. This not only provides technical support for the further development of quantum computers but also lays the foundation for their widespread use. Despite the significant progress made with this technology, the realization of quantum computing still faces numerous challenges. First, the hardware design and manufacturing of quantum computers remain a technical difficulty. Achieving stable qubits and effectively managing quantum entanglement and superposition states are key issues that need to be addressed in the practical application of quantum computers. Additionally, the design of quantum algorithms needs further development. In other fields and application scenarios, more quantum algorithms are still needed to support the broader adoption of quantum computing. The widespread adoption of quantum computing also requires overcoming obstacles beyond just technology. Currently, research in quantum computing is mainly concentrated in academia and a few technology companies. The challenge moving forward will be how to translate these research outcomes into practical applications and promote the commercialization of quantum computing. Despite these challenges, the innovative technology developed by MicroAlgo (NASDAQ: MLGO) undoubtedly offers new possibilities for the future development of quantum computing. With continuous technological advancement and the expansion of application scenarios, quantum computing will play an increasingly important role in the future technological revolution. Through ongoing technological innovation and research investment, the company will continue to lead the development of quantum computing, contributing to the progress of global computing technology. About MicroAlgo Inc. MicroAlgo Inc. (the "MicroAlgo"), a Cayman Islands exempted company, is dedicated to the development and application of bespoke central processing algorithms. MicroAlgo provides comprehensive solutions to customers by integrating central processing algorithms with software or hardware, or both, thereby helping them to increase the number of customers, improve end-user satisfaction, achieve direct cost savings, reduce power consumption, and achieve technical goals. The range of MicroAlgo's services includes algorithm optimization, accelerating computing power without the need for hardware upgrades, lightweight data processing, and data intelligence services. MicroAlgo's ability to efficiently deliver software and hardware optimization to customers through bespoke central processing algorithms serves as a driving force for MicroAlgo's long-term development. Forward-Looking Statements This press release contains statements that may constitute "forward-looking statements." Forward-looking statements are subject to numerous conditions, many of which are beyond the control of MicroAlgo, including those set forth in the Risk Factors section of MicroAlgo's periodic reports on Forms 10-K and 8-K filed with the SEC. Copies are available on the SEC's website, www.sec.gov. Words such as "expect," "estimate," "project," "budget," "forecast," "anticipate," "intend," "plan," "may," "will," "could," "should," "believes," "predicts," "potential," "continue," and similar expressions are intended to identify such forward-looking statements. These forward-looking statements include, without limitation, MicroAlgo's expectations with respect to future performance and anticipated financial impacts of the business transaction. MicroAlgo undertakes no obligation to update these statements for revisions or changes after the date of this release, except as may be required by law.
聖荷西，美國加州 - Media OutReach Newswire - 2024年11月22日 - 領先的高效可配置 IP 計算核心開發商 MIPS 今天宣佈正式推出 MIPS P8700 系列 RISC-V 處理器。P8700 提供業界領先的加速計算、功率效率和可擴展性，旨在滿足 ADAS 和自動駕駛汽車 (AV) 等最先進汽車應用的低延遲、高密集數據傳輸需求。' 典型的ADAS 和自動駕駛解決方案往往依賴粗暴的提高性能方法，即以提高時鐘頻率和核心數量，強行實現困難的合成式性能。P8700 具有多執行緒和節能架構，使 MIPS 客戶能夠實現比當前市場解決方案更少的 CPU 核心和更低的熱設計功耗 (TDP)，從而使 OEM 能夠以經濟實惠且高度可擴展的方式開發 ADAS 解決方案。它還通過提供高效、最佳化且低功耗的延遲敏感解決方案(專門針對中斷負載多感測器平臺)來緩解數據行動效率低下的系統瓶頸。 對於具有 AI 自主軟體堆疊的 L2+ ADAS 系統，MIPS P8700 還可以卸載深度學習中不易量化的核心處理元素，並通過基於稀疏性的卷積處理函數來減少處理元素，從而使 AI 堆疊軟體利用率和效率提高 30% 以上。 MIPS 執行長 Sameer Wasson 表示：「汽車市場需要能夠即時處理來自多個感測器的大量數據，並以高效方式為 AI 加速器進行處理的 CPU。MIPS 多執行緒和其他針對汽車應用客製化的架構掛鉤，使其成為數據密集型處理任務的有力核心。這將使汽車 OEM 擁有高性能計算系統，消耗更少電量並更好地利用 AI 加速器。」 MIPS P8700 核心採用基於 RISC-V ISA 的多核/多叢集和多執行緒 CPU IP，目前正與多家主要 OEM 合作進行批量生產。Mobileye (納斯達克股票代碼：MBLY) 等主要客戶已採用這種方法來開發未來的自動駕駛汽車和高度自動化駕駛系統產品。 Mobileye 工程執行副總裁 Elchanan Rushinek 表示：「我們成功開發用於 ADAS 和自動駕駛汽車的 EyeQ™ 片上系統，有賴關鍵合作夥伴MIPS。MIPS P8700 RISC-V 核心的推出，將有助於我們為全球汽車製造商持續開發產品以實現更高性能以及卓越成本和功耗效率。」 P8700 系列是一款高性能亂序處理器，採用 RISC-V RV64GC 架構，包括專為提高性能、功耗、面積尺寸而設計的新 CPU 和系統級功能，以及基於傳統 MIPS 微架構所建立的其他成熟功能，目前已在全球 OEM 市場上部署了 30 多種車型。MIPS 的最新處理器旨在提供業界領先的計算密度，具有三個關鍵架構特性，包括： MIPS 亂序多執行緒 — 支援每個時鐘週期執行來自多個執行緒 (harts) 的多條指令，從而提高利用率和 CPU 效率。 一致的多核、多叢集 — P8700 系列可擴展至在一個叢集中包含 6 個一致的 P8700 核心，每個叢集都支援直接連接加速器。 功能安全 — 旨在滿足 ASIL-B(D) 功能安全標準 (ISO26262)，整合了多種故障檢測功能，例如位址和數據匯流排上的端到端同位保護、軟體可見寄存器上的同位保護、用於向系統報告故障的故障匯流排等。 MIPS P8700 處理器現已在廣泛市場推出，主要合作夥伴已經準備就緒。預計不久將通過 OEM 供貨。 有關 MIPS P8700 的更多資訊，請瀏覽 MIPS.com/markets/automotive/。 Hashtag: #MIPS發佈者對本公告的內容承擔全部責任關於 MIPSMIPS 正在加速汽車、雲端和嵌入式市場的計算密度。MIPS 業界領先的核心可配置、高效且易於實施，讓客戶能夠自由地為特定工作負載構建獨特的產品。其多執行緒方法提供了高級可擴展性以及高效行動和更快處理數據的能力。該公司的計算 DNA 跨越三十年，迄今為止已出貨數十億塊基於 MIPS 的晶片。如需瞭解更多資訊，請瀏覽 www.MIPS.com。
SAN JOSE, CALIFORNIA - Media OutReach Newswire - 22 November 2024 - MIPS, a leading developer of efficient and configurable IP compute cores, announced today the general availability (GA) launch of the MIPS P8700 Series RISC-V Processor. Designed to meet the low-latency, highly intensive data movement demands of the most advanced automotive applications such as ADAS and Autonomous Vehicles (AVs), the P8700 delivers industry-leading accelerated compute, power efficiency and scalability. Typical solutions for ADAS and autonomous driving rely on a brute-force approach of embedding a higher number of cores at higher clock rates driving synthetic, albeit unrealistic and unrealized performance. The P8700 with its multi-threaded and power-efficient architecture allows MIPS customers to implement fewer CPU cores and much lower thermal design power (TDP) than the current market solutions, thereby allowing OEMs to develop ADAS solutions in an affordable and highly scalable manner. It also mitigates the system bottlenecks of data movement inefficiency by providing highly efficient, optimized and lower power latency sensitive solution specifically tailored for interrupt laden multi-sensor platforms. For L2+ ADAS systems with AI Autonomous software stack, the MIPS P8700 can also offload core processing elements that cannot be easily quantized in deep learning and reduced by sparsity-based convolution processing functions, resulting in >30% better AI Stack software utilization and efficiency. "The automotive market demands CPUs which can process a large amount of data from multiple sensors in real-time and feed the AI Accelerators to process in an efficient manner said Sameer Wasson, CEO of MIPS. "The MIPS Multi-threading and other architectural hooks tailored for automotive applications, make it a compelling core for data intensive processing tasks. This will enable Automotive OEMs to have high performance compute systems which consume less power and better utilize AI Accelerators." The MIPS P8700 core, featuring multi-core/multi-cluster and multi-threaded CPU IP based on the RISC-V ISA, is now progressing toward series production with multiple major OEMs. Key customers like Mobileye (Nasdaq: MBLY) have embraced this approach for future products for self-driving vehicles and highly automated driving systems. "MIPS has been a key collaborator in our success with the EyeQ™ systems-on-chip for ADAS and autonomous vehicles," said Elchanan Rushinek, executive vice president of engineering for Mobileye. "The launch of the MIPS P8700 RISC-V core will help drive our continued development for global automakers, enabling greater performance and excellent efficiency in cost and power usage." The P8700 Series is a high-performance out-of-order processor that implements the RISC-V RV64GC architecture, including new CPU and system-level features designed for performance, power, area form factors and additional proven features built on legacy MIPS micro-architecture deployed in more than 30+ car models today across the global OEM market. Engineered to deliver industry-leading compute density, MIPS' latest processor harnesses three key architectural features, including: MIPS Out-of-Order Multi-threading - enables execution of multiple instructions from multiple threads (harts) every clock cycle, providing higher utilization and CPU efficiency. Coherent Multi-Core, Multi-Cluster - The P8700 Series scales up to 6 coherent P8700 cores in a cluster with each cluster supporting direct attach accelerators. Functional Safety - designed to meet the ASIL-B(D) functional safety standard (ISO26262) by incorporating several fault detection capabilities such as end-to-end parity protection on address and data buses, parity protection on software visible registers, fault bus for reporting faults to the system, and more The MIPS P8700 processor is now available to the broader market, with key partnerships already in place. Shipments with OEM launches are expected shortly. For more information about the MIPS P8700, please visit https://mips.com/markets/automotive/. Hashtag: #MIPSThe issuer is solely responsible for the content of this announcement.About MIPSMIPS is accelerating compute density in the automotive, cloud and embedded markets. Giving customers the freedom to build unique products for specific workloads, MIPS' industry-leading cores are configurable, efficient and easy to implement. Its multi-threading methodology delivers advanced scalability and the ability to efficiently move and process data faster. The company's compute DNA spans three decades with billions of MIPS-based chips shipped to date. For more information, visit www.MIPS.com.
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